216 lines
11 KiB
C
216 lines
11 KiB
C
/*
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*********************************************************************************************************
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* uC/CPU
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* CPU CONFIGURATION & PORT LAYER
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*
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* (c) Copyright 2004-2013; Micrium, Inc.; Weston, FL
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*
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* All rights reserved. Protected by international copyright laws.
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*
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* uC/CPU is provided in source form to registered licensees ONLY. It is
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* illegal to distribute this source code to any third party unless you receive
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* written permission by an authorized Micrium representative. Knowledge of
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* the source code may NOT be used to develop a similar product.
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*
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* Please help us continue to provide the Embedded community with the finest
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* software available. Your honesty is greatly appreciated.
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*
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* You can find our product's user manual, API reference, release notes and
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* more information at https://doc.micrium.com.
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* You can contact us at www.micrium.com.
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* CPU CONFIGURATION FILE
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*
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* TEMPLATE
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*
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* Filename : cpu_cfg.h
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* Version : V1.30.00
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* Programmer(s) : SR
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* ITJ
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* JBL
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* MODULE
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*********************************************************************************************************
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*/
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#ifndef CPU_CFG_MODULE_PRESENT
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#define CPU_CFG_MODULE_PRESENT
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/*
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*********************************************************************************************************
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* CPU NAME CONFIGURATION
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*
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* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature :
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*
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* (a) CPU host name storage
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* (b) CPU host name API functions
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*
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* (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name,
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* including the terminating NULL character.
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*
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* See also 'cpu_core.h GLOBAL VARIABLES Note #1'.
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*********************************************************************************************************
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*/
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/* Configure CPU host name feature (see Note #1) : */
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#define CPU_CFG_NAME_EN DEF_ENABLED
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/* DEF_DISABLED CPU host name DISABLED */
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/* DEF_ENABLED CPU host name ENABLED */
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/* Configure CPU host name ASCII string size ... */
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#define CPU_CFG_NAME_SIZE 16 /* ... (see Note #2). */
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/*
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*********************************************************************************************************
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* CPU TIMESTAMP CONFIGURATION
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*
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* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features :
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*
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* (a) CPU_CFG_TS_32_EN enable/disable 32-bit CPU timestamp feature
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* (b) CPU_CFG_TS_64_EN enable/disable 64-bit CPU timestamp feature
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*
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* (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size :
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*
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* CPU_WORD_SIZE_08 8-bit word size
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* CPU_WORD_SIZE_16 16-bit word size
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* CPU_WORD_SIZE_32 32-bit word size
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* CPU_WORD_SIZE_64 64-bit word size
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*
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* (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets
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* (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word
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* size SHOULD be configured (e.g. to 16-bits). However, the minimum supported word
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* size for CPU timestamp timers is 8-bits.
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*
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* See also 'cpu_core.h FUNCTION PROTOTYPES CPU_TS_TmrRd() Note #2a'.
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*********************************************************************************************************
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*/
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/* Configure CPU timestamp features (see Note #1) : */
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#define CPU_CFG_TS_32_EN DEF_ENABLED
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#define CPU_CFG_TS_64_EN DEF_DISABLED
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/* DEF_DISABLED CPU timestamps DISABLED */
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/* DEF_ENABLED CPU timestamps ENABLED */
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/* Configure CPU timestamp timer word size ... */
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/* ... (see Note #2) : */
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#define CPU_CFG_TS_TMR_SIZE CPU_WORD_SIZE_32
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/*
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*********************************************************************************************************
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* CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION
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*
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* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts
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* disabled time :
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*
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* (a) Enabled, if CPU_CFG_INT_DIS_MEAS_EN #define'd in 'cpu_cfg.h'
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*
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* (b) Disabled, if CPU_CFG_INT_DIS_MEAS_EN NOT #define'd in 'cpu_cfg.h'
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*
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* See also 'cpu_core.h FUNCTION PROTOTYPES Note #1'.
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*
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* (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure &
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* average the interrupts disabled time measurements overhead.
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*
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* See also 'cpu_core.c CPU_IntDisMeasInit() Note #3a'.
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*********************************************************************************************************
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*/
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#if 0 /* Configure CPU interrupts disabled time ... */
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#define CPU_CFG_INT_DIS_MEAS_EN /* ... measurements feature (see Note #1a). */
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#endif
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/* Configure number of interrupts disabled overhead ... */
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#define CPU_CFG_INT_DIS_MEAS_OVRHD_NBR 1u /* ... time measurements (see Note #1b). */
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/*
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*********************************************************************************************************
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* CPU COUNT ZEROS CONFIGURATION
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*
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* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits
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* function(s) in :
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*
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* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable assembly-optimized function(s)
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*
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* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
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*
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* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits
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* function(s) in :
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*
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* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable assembly-optimized function(s)
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*
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* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
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*********************************************************************************************************
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*/
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#if 1 /* Configure CPU count leading zeros bits ... */
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#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */
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#endif
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#if 0 /* Configure CPU count trailing zeros bits ... */
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#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */
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#endif
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/*
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*********************************************************************************************************
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* CPU ENDIAN TYPE OVERRIDE
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*
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* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h.
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*
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* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant
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* octet @ lowest memory address)
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* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant
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* octet @ lowest memory address)
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*
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* (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures.
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* See 'cpu.h CPU WORD CONFIGURATION Note #3' for details
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*********************************************************************************************************
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*/
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#if 0
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#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_BIG /* Defines CPU data word-memory order (see Note #2). */
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#endif
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/*
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*********************************************************************************************************
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* CACHE MANAGEMENT
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*
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* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API.
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*
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* (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function.
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* Cache are assumed to be configured and enabled by the time CPU_init() is called.
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*********************************************************************************************************
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*/
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#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED /* Defines CPU data word-memory order (see Note #1). */
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/*
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*********************************************************************************************************
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* MODULE END
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*********************************************************************************************************
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*/
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#endif /* End of CPU cfg module include. */
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