831 lines
37 KiB
Plaintext
831 lines
37 KiB
Plaintext
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ARM Macro Assembler Page 1
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1 00000000 ;
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2 00000000 ;*******************************************************
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*************************************************
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3 00000000 ; uC/OS-I
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I
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4 00000000 ; The Real-Time
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Kernel
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5 00000000 ;
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6 00000000 ;
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7 00000000 ; (c) Copyright 2009-2013; Micri
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um, Inc.; Weston, FL
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8 00000000 ; All rights reserved. Protected by
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international copyright laws.
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9 00000000 ;
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10 00000000 ; ARM Cortex-M
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4 Port
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11 00000000 ;
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12 00000000 ; File : OS_CPU_A.ASM
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13 00000000 ; Version : V2.92.09
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14 00000000 ; By : JJL
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15 00000000 ; BAN
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16 00000000 ; JBL
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17 00000000 ;
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18 00000000 ; For : ARMv7 Cortex-M4
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19 00000000 ; Mode : Thumb-2 ISA
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20 00000000 ; Toolchain : RealView Development Suite
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21 00000000 ; RealView Microcontroller Development Kit (
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MDK)
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22 00000000 ; ARM Developer Suite (ADS)
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23 00000000 ; Keil uVision
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24 00000000 ;*******************************************************
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*************************************************
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25 00000000 ;
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26 00000000
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27 00000000 ;*******************************************************
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*************************************************
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28 00000000 ; PUBLIC FUNCTI
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ONS
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29 00000000 ;*******************************************************
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*************************************************
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30 00000000
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31 00000000 EXTERN OSRunning ; External referenc
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es
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32 00000000 EXTERN OSPrioCur
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33 00000000 EXTERN OSPrioHighRdy
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34 00000000 EXTERN OSTCBCur
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35 00000000 EXTERN OSTCBHighRdy
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36 00000000 EXTERN OSIntExit
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37 00000000 EXTERN OSTaskSwHook
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38 00000000 EXTERN OS_CPU_ExceptStkBase
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39 00000000
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40 00000000 EXPORT OS_CPU_SR_Save ; Functions decl
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ared in this file
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41 00000000 EXPORT OS_CPU_SR_Restore
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42 00000000 EXPORT OSStartHighRdy
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43 00000000 EXPORT OSCtxSw
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44 00000000 EXPORT OSIntCtxSw
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45 00000000 EXPORT OS_CPU_PendSVHandler
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46 00000000
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ARM Macro Assembler Page 2
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47 00000000 IF {FPU} != "SoftVFP"
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48 00000000 EXPORT OS_CPU_FP_Reg_Push
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49 00000000 EXPORT OS_CPU_FP_Reg_Pop
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50 00000000 ENDIF
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51 00000000
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52 00000000
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53 00000000 ;*******************************************************
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*************************************************
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54 00000000 ; EQUATES
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55 00000000 ;*******************************************************
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*************************************************
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56 00000000
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57 00000000 E000ED04
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NVIC_INT_CTRL
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EQU 0xE000ED04 ; Interrupt control
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state register.
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58 00000000 E000ED22
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NVIC_SYSPRI14
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EQU 0xE000ED22 ; System priority r
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egister (priority 1
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4).
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59 00000000 000000FF
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NVIC_PENDSV_PRI
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EQU 0xFF ; PendSV priority v
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alue (lowest).
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60 00000000 10000000
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NVIC_PENDSVSET
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EQU 0x10000000 ; Value to trigger
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PendSV exception.
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61 00000000
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62 00000000
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63 00000000 ;*******************************************************
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*************************************************
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64 00000000 ; CODE GENERATION DI
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RECTIVES
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65 00000000 ;*******************************************************
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*************************************************
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66 00000000
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67 00000000 AREA |.text|, CODE, READONLY, ALIGN=
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2
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68 00000000 THUMB
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69 00000000 REQUIRE8
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70 00000000 PRESERVE8
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71 00000000
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72 00000000
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73 00000000 ;*******************************************************
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*************************************************
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74 00000000 ; FLOATING POINT REGIS
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TERS PUSH
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75 00000000 ; void OS_CPU_FP_Reg_Push (
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CPU_STK *stkPtr)
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76 00000000 ;
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77 00000000 ; Note(s) : 1) This function saves S0-S31, and FPSCR reg
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isters of the Floating Point Unit.
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78 00000000 ;
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79 00000000 ; 2) Pseudo-code is:
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80 00000000 ; a) Get FPSCR register value;
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81 00000000 ; b) Push value on process stack;
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82 00000000 ; c) Push remaining regs S0-S31 on process
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ARM Macro Assembler Page 3
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stack;
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83 00000000 ; d) Update OSTCBCurPtr->StkPtr;
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84 00000000 ;*******************************************************
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*************************************************
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85 00000000
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86 00000000 IF {FPU} != "SoftVFP"
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87 00000000
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88 00000000 OS_CPU_FP_Reg_Push
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89 00000000 F3EF 8109 MRS R1, PSP ; PSP is process st
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ack pointer
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90 00000004 B141 CBZ R1, OS_CPU_FP_nosave ; Skip FP
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register save the f
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irst time
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91 00000006
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92 00000006 EEF1 1A10 VMRS R1, FPSCR
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93 0000000A F840 1D04 STR R1, [R0, #-4]!
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94 0000000E ED20 0A20 VSTMDB R0!, {S0-S31}
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95 00000012 4929 LDR R1, =OSTCBCur
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96 00000014 680A LDR R2, [R1]
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97 00000016 6010 STR R0, [R2]
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98 00000018 OS_CPU_FP_nosave
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99 00000018 4770 BX LR
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100 0000001A
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101 0000001A ENDIF
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102 0000001A
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103 0000001A
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104 0000001A ;*******************************************************
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*************************************************
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105 0000001A ; FLOATING POINT REGIS
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TERS POP
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106 0000001A ; void OS_CPU_FP_Reg_Pop (C
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PU_STK *stkPtr)
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107 0000001A ;
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108 0000001A ; Note(s) : 1) This function restores S0-S31, and FPSCR
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registers of the Floating Point Unit.
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109 0000001A ;
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110 0000001A ; 2) Pseudo-code is:
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111 0000001A ; a) Restore regs S0-S31 of new process sta
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ck;
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112 0000001A ; b) Restore FPSCR reg value
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113 0000001A ; c) Update OSTCBHighRdyPtr->StkPtr pointer
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of new proces stack;
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114 0000001A ;*******************************************************
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*************************************************
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115 0000001A
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116 0000001A IF {FPU} != "SoftVFP"
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117 0000001A
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118 0000001A OS_CPU_FP_Reg_Pop
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119 0000001A ECB0 0A20 VLDMIA R0!, {S0-S31}
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120 0000001E C802 LDMIA R0!, {R1}
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121 00000020 EEE1 1A10 VMSR FPSCR, R1
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122 00000024 4925 LDR R1, =OSTCBHighRdy
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123 00000026 680A LDR R2, [R1]
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124 00000028 6010 STR R0, [R2]
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125 0000002A 4770 BX LR
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126 0000002C
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127 0000002C ENDIF
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128 0000002C
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129 0000002C
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ARM Macro Assembler Page 4
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130 0000002C ;*******************************************************
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*************************************************
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131 0000002C ; CRITICAL SECTION MET
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HOD 3 FUNCTIONS
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132 0000002C ;
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133 0000002C ; Description: Disable/Enable interrupts by preserving t
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he state of interrupts. Generally speaking you
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134 0000002C ; would store the state of the interrupt di
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sable flag in the local variable 'cpu_sr' and then
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135 0000002C ; disable interrupts. 'cpu_sr' is allocate
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d in all of uC/OS-II's functions that need to
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136 0000002C ; disable interrupts. You would restore th
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e interrupt disable state by copying back 'cpu_sr'
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137 0000002C ; into the CPU's status register.
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138 0000002C ;
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139 0000002C ; Prototypes : OS_CPU_SR OS_CPU_SR_Save(void);
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140 0000002C ; void OS_CPU_SR_Restore(OS_CPU_S
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R cpu_sr);
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141 0000002C ;
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142 0000002C ;
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143 0000002C ; Note(s) : 1) These functions are used in general li
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ke this:
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144 0000002C ;
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145 0000002C ; void Task (void *p_arg)
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146 0000002C ; {
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147 0000002C ; #if OS_CRITICAL_METHOD == 3 /
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* Allocate storage for CPU status register */
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148 0000002C ; OS_CPU_SR cpu_sr;
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149 0000002C ; #endif
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150 0000002C ;
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151 0000002C ; :
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152 0000002C ; :
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153 0000002C ; OS_ENTER_CRITICAL(); /
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* cpu_sr = OS_CPU_SaveSR(); */
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154 0000002C ; :
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155 0000002C ; :
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156 0000002C ; OS_EXIT_CRITICAL(); /
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* OS_CPU_RestoreSR(cpu_sr); */
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157 0000002C ; :
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158 0000002C ; :
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159 0000002C ; }
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160 0000002C ;*******************************************************
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*************************************************
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161 0000002C
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162 0000002C OS_CPU_SR_Save
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163 0000002C F3EF 8010 MRS R0, PRIMASK ; Set prio int mask
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to mask all (excep
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t faults)
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164 00000030 B672 CPSID I
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165 00000032 4770 BX LR
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166 00000034
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167 00000034 OS_CPU_SR_Restore
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168 00000034 F380 8810 MSR PRIMASK, R0
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169 00000038 4770 BX LR
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170 0000003A
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171 0000003A
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172 0000003A ;*******************************************************
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*************************************************
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173 0000003A ; START MULTITAS
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ARM Macro Assembler Page 5
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KING
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174 0000003A ; void OSStartHighR
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dy(void)
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175 0000003A ;
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176 0000003A ; Note(s) : 1) This function triggers a PendSV exception
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(essentially, causes a context switch) to cause
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177 0000003A ; the first task to start.
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178 0000003A ;
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179 0000003A ; 2) OSStartHighRdy() MUST:
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180 0000003A ; a) Setup PendSV exception priority to low
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est;
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181 0000003A ; b) Set initial PSP to 0, to tell context
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switcher this is first run;
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182 0000003A ; c) Set the main stack to OS_CPU_ExceptStk
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Base
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183 0000003A ; d) Set OSRunning to TRUE;
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184 0000003A ; e) Trigger PendSV exception;
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185 0000003A ; f) Enable interrupts (tasks will run with
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interrupts enabled).
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186 0000003A ;*******************************************************
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*************************************************
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187 0000003A
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188 0000003A OSStartHighRdy
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189 0000003A 4821 LDR R0, =NVIC_SYSPRI14 ; Set the Pe
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ndSV exception prio
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rity
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190 0000003C F04F 01FF LDR R1, =NVIC_PENDSV_PRI
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191 00000040 7001 STRB R1, [R0]
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192 00000042
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193 00000042 2000 MOVS R0, #0 ; Set the PSP to 0
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for initial context
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switch call
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194 00000044 F380 8809 MSR PSP, R0
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195 00000048
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196 00000048 481E LDR R0, =OS_CPU_ExceptStkBase ; Ini
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tialize the MSP to
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the OS_CPU_ExceptSt
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kBase
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197 0000004A 6801 LDR R1, [R0]
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198 0000004C F381 8808 MSR MSP, R1
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199 00000050
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200 00000050 481D LDR R0, =OSRunning
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; OSRunning = TRUE
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201 00000052 2101 MOVS R1, #1
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202 00000054 7001 STRB R1, [R0]
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203 00000056
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204 00000056 481D LDR R0, =NVIC_INT_CTRL ; Trigger th
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e PendSV exception
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(causes context swi
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tch)
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205 00000058 F04F 5180 LDR R1, =NVIC_PENDSVSET
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206 0000005C 6001 STR R1, [R0]
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207 0000005E
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208 0000005E B662 CPSIE I ; Enable interrupts
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at processor level
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209 00000060
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210 00000060 OSStartHang
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211 00000060 E7FE B OSStartHang ; Should never get
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ARM Macro Assembler Page 6
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here
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212 00000062
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213 00000062
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214 00000062 ;*******************************************************
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*************************************************
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215 00000062 ; PERFORM A CONTEXT SWITCH (From t
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ask level) - OSCtxSw()
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216 00000062 ;
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217 00000062 ; Note(s) : 1) OSCtxSw() is called when OS wants to perf
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orm a task context switch. This function
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218 00000062 ; triggers the PendSV exception which is wh
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ere the real work is done.
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219 00000062 ;*******************************************************
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*************************************************
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220 00000062
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221 00000062 OSCtxSw
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222 00000062 481A LDR R0, =NVIC_INT_CTRL ; Trigger th
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e PendSV exception
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(causes context swi
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tch)
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223 00000064 F04F 5180 LDR R1, =NVIC_PENDSVSET
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224 00000068 6001 STR R1, [R0]
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225 0000006A 4770 BX LR
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226 0000006C
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227 0000006C
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228 0000006C ;*******************************************************
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*************************************************
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229 0000006C ; PERFORM A CONTEXT SWITCH (From inter
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rupt level) - OSIntCtxSw()
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230 0000006C ;
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231 0000006C ; Note(s) : 1) OSIntCtxSw() is called by OSIntExit() whe
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n it determines a context switch is needed as
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232 0000006C ; the result of an interrupt. This functio
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n simply triggers a PendSV exception which will
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233 0000006C ; be handled when there are no more interru
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pts active and interrupts are enabled.
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234 0000006C ;*******************************************************
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*************************************************
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235 0000006C
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236 0000006C OSIntCtxSw
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237 0000006C 4817 LDR R0, =NVIC_INT_CTRL ; Trigger th
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e PendSV exception
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(causes context swi
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tch)
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238 0000006E F04F 5180 LDR R1, =NVIC_PENDSVSET
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239 00000072 6001 STR R1, [R0]
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240 00000074 4770 BX LR
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241 00000076
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242 00000076
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243 00000076 ;*******************************************************
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*************************************************
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244 00000076 ; HANDLE PendSV EX
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CEPTION
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245 00000076 ; void OS_CPU_PendSVHa
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ndler(void)
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246 00000076 ;
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247 00000076 ; Note(s) : 1) PendSV is used to cause a context switch.
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This is a recommended method for performing
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248 00000076 ; context switches with Cortex-M3. This is
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ARM Macro Assembler Page 7
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because the Cortex-M3 auto-saves half of the
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249 00000076 ; processor context on any exception, and r
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estores same on return from exception. So only
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250 00000076 ; saving of R4-R11 is required and fixing u
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p the stack pointers. Using the PendSV exception
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251 00000076 ; this way means that context saving and re
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storing is identical whether it is initiated from
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252 00000076 ; a thread or occurs due to an interrupt or
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exception.
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253 00000076 ;
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254 00000076 ; 2) Pseudo-code is:
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255 00000076 ; a) Get the process SP, if 0 then skip (go
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to d) the saving part (first context switch);
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256 00000076 ; b) Save remaining regs r4-r11 on process
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stack;
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257 00000076 ; c) Save the process SP in its TCB, OSTCBC
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ur->OSTCBStkPtr = SP;
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258 00000076 ; d) Call OSTaskSwHook();
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259 00000076 ; e) Get current high priority, OSPrioCur =
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OSPrioHighRdy;
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260 00000076 ; f) Get current ready thread TCB, OSTCBCur
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= OSTCBHighRdy;
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261 00000076 ; g) Get new process SP from TCB, SP = OSTC
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BHighRdy->OSTCBStkPtr;
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262 00000076 ; h) Restore R4-R11 from new process stack;
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263 00000076 ; i) Perform exception return which will re
|
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store remaining context.
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264 00000076 ;
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265 00000076 ; 3) On entry into PendSV handler:
|
||
266 00000076 ; a) The following have been saved on the p
|
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rocess stack (by processor):
|
||
267 00000076 ; xPSR, PC, LR, R12, R0-R3
|
||
268 00000076 ; b) Processor mode is switched to Handler
|
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mode (from Thread mode)
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269 00000076 ; c) Stack is Main stack (switched from Pro
|
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cess stack)
|
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270 00000076 ; d) OSTCBCur points to the OS_TCB of
|
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the task to suspend
|
||
271 00000076 ; OSTCBHighRdy points to the OS_TCB of
|
||
the task to resume
|
||
272 00000076 ;
|
||
273 00000076 ; 4) Since PendSV is set to lowest priority in
|
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the system (by OSStartHighRdy() above), we
|
||
274 00000076 ; know that it will only be run when no oth
|
||
er exception or interrupt is active, and
|
||
275 00000076 ; therefore safe to assume that context bei
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||
ng switched out was using the process stack (PSP).
|
||
276 00000076 ;*******************************************************
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||
*************************************************
|
||
277 00000076
|
||
278 00000076 OS_CPU_PendSVHandler
|
||
279 00000076 B672 CPSID I ; Prevent interrupt
|
||
ion during context
|
||
switch
|
||
280 00000078 F3EF 8009 MRS R0, PSP ; PSP is process st
|
||
ack pointer
|
||
281 0000007C B128 CBZ R0, OS_CPU_PendSVHandler_nosave
|
||
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 8
|
||
|
||
|
||
; Skip register sav
|
||
e the first time
|
||
282 0000007E
|
||
283 0000007E 3820 SUBS R0, R0, #0x20 ; Save remaining
|
||
regs r4-11 on proce
|
||
ss stack
|
||
284 00000080 E880 0FF0 STM R0, {R4-R11}
|
||
285 00000084
|
||
286 00000084 490C LDR R1, =OSTCBCur ; OSTCBCur->OSTCB
|
||
StkPtr = SP;
|
||
287 00000086 6809 LDR R1, [R1]
|
||
288 00000088 6008 STR R0, [R1] ; R0 is SP of proce
|
||
ss being switched o
|
||
ut
|
||
289 0000008A
|
||
290 0000008A ; At this point, entire context of process has been save
|
||
d
|
||
291 0000008A OS_CPU_PendSVHandler_nosave
|
||
292 0000008A B500 PUSH {R14} ; Save LR exc_retur
|
||
n value
|
||
293 0000008C 4810 LDR R0, =OSTaskSwHook
|
||
; OSTaskSwHook();
|
||
294 0000008E 4780 BLX R0
|
||
295 00000090 F85D EB04 POP {R14}
|
||
296 00000094
|
||
297 00000094 480F LDR R0, =OSPrioCur ; OSPrioCur = OS
|
||
PrioHighRdy;
|
||
298 00000096 4910 LDR R1, =OSPrioHighRdy
|
||
299 00000098 780A LDRB R2, [R1]
|
||
300 0000009A 7002 STRB R2, [R0]
|
||
301 0000009C
|
||
302 0000009C 4806 LDR R0, =OSTCBCur ; OSTCBCur = OST
|
||
CBHighRdy;
|
||
303 0000009E 4907 LDR R1, =OSTCBHighRdy
|
||
304 000000A0 680A LDR R2, [R1]
|
||
305 000000A2 6002 STR R2, [R0]
|
||
306 000000A4
|
||
307 000000A4 6810 LDR R0, [R2] ; R0 is new process
|
||
SP; SP = OSTCBHigh
|
||
Rdy->OSTCBStkPtr;
|
||
308 000000A6 E890 0FF0 LDM R0, {R4-R11} ; Restore r4-11 fr
|
||
om new process stac
|
||
k
|
||
309 000000AA 3020 ADDS R0, R0, #0x20
|
||
310 000000AC F380 8809 MSR PSP, R0 ; Load PSP with new
|
||
process SP
|
||
311 000000B0 F04E 0EF4 ORR LR, LR, #0xF4 ; Ensure exceptio
|
||
n return uses proce
|
||
ss stack
|
||
312 000000B4 B662 CPSIE I
|
||
313 000000B6 4770 BX LR ; Exception return
|
||
will restore remain
|
||
ing context
|
||
314 000000B8
|
||
315 000000B8 END
|
||
00000000
|
||
00000000
|
||
E000ED22
|
||
00000000
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 9
|
||
|
||
|
||
00000000
|
||
E000ED04
|
||
00000000
|
||
00000000
|
||
00000000
|
||
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M4.fp --apcs=int
|
||
erwork --depend=.\objects\os_cpu_a.d -o.\objects\os_cpu_a.o -ID:\project\<5C><>ѵ\F
|
||
ATFSϵ<EFBFBD><EFBFBD>\FATFS\Project\MDK\RTE -ID:\IDE\Keil_v5\ARM\PACK\Keil\TM4C_DFP\1.1.0\De
|
||
vice\Include\TM4C129 -ID:\IDE\Keil_v5\ARM\CMSIS\Include --predefine="__MICROLIB
|
||
SETA 1" --predefine="__UVISION_VERSION SETA 518" --predefine="TM4C1292NCPDT SE
|
||
TA 1" --list=.\listings\os_cpu_a.lst ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\
|
||
Ports\ARM-Cortex-M4\Generic\RealView\os_cpu_a.asm
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 1 Alphabetic symbol ordering
|
||
Relocatable symbols
|
||
|
||
.text 00000000
|
||
|
||
Symbol: .text
|
||
Definitions
|
||
At line 67 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
None
|
||
Comment: .text unused
|
||
OSCtxSw 00000062
|
||
|
||
Symbol: OSCtxSw
|
||
Definitions
|
||
At line 221 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 43 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSCtxSw used once
|
||
OSIntCtxSw 0000006C
|
||
|
||
Symbol: OSIntCtxSw
|
||
Definitions
|
||
At line 236 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 44 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSIntCtxSw used once
|
||
OSStartHang 00000060
|
||
|
||
Symbol: OSStartHang
|
||
Definitions
|
||
At line 210 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 211 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSStartHang used once
|
||
OSStartHighRdy 0000003A
|
||
|
||
Symbol: OSStartHighRdy
|
||
Definitions
|
||
At line 188 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 42 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSStartHighRdy used once
|
||
OS_CPU_FP_Reg_Pop 0000001A
|
||
|
||
Symbol: OS_CPU_FP_Reg_Pop
|
||
Definitions
|
||
At line 118 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 49 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OS_CPU_FP_Reg_Pop used once
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 2 Alphabetic symbol ordering
|
||
Relocatable symbols
|
||
|
||
OS_CPU_FP_Reg_Push 00000000
|
||
|
||
Symbol: OS_CPU_FP_Reg_Push
|
||
Definitions
|
||
At line 88 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 48 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OS_CPU_FP_Reg_Push used once
|
||
OS_CPU_FP_nosave 00000018
|
||
|
||
Symbol: OS_CPU_FP_nosave
|
||
Definitions
|
||
At line 98 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 90 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OS_CPU_FP_nosave used once
|
||
OS_CPU_PendSVHandler 00000076
|
||
|
||
Symbol: OS_CPU_PendSVHandler
|
||
Definitions
|
||
At line 278 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 45 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OS_CPU_PendSVHandler used once
|
||
OS_CPU_PendSVHandler_nosave 0000008A
|
||
|
||
Symbol: OS_CPU_PendSVHandler_nosave
|
||
Definitions
|
||
At line 291 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 281 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OS_CPU_PendSVHandler_nosave used once
|
||
OS_CPU_SR_Restore 00000034
|
||
|
||
Symbol: OS_CPU_SR_Restore
|
||
Definitions
|
||
At line 167 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 41 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OS_CPU_SR_Restore used once
|
||
OS_CPU_SR_Save 0000002C
|
||
|
||
Symbol: OS_CPU_SR_Save
|
||
Definitions
|
||
At line 162 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 40 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 3 Alphabetic symbol ordering
|
||
Relocatable symbols
|
||
|
||
Comment: OS_CPU_SR_Save used once
|
||
12 symbols
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 1 Alphabetic symbol ordering
|
||
Absolute symbols
|
||
|
||
NVIC_INT_CTRL E000ED04
|
||
|
||
Symbol: NVIC_INT_CTRL
|
||
Definitions
|
||
At line 57 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 204 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
At line 222 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
At line 237 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
|
||
NVIC_PENDSVSET 10000000
|
||
|
||
Symbol: NVIC_PENDSVSET
|
||
Definitions
|
||
At line 60 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 205 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
At line 223 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
At line 238 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
|
||
NVIC_PENDSV_PRI 000000FF
|
||
|
||
Symbol: NVIC_PENDSV_PRI
|
||
Definitions
|
||
At line 59 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 190 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: NVIC_PENDSV_PRI used once
|
||
NVIC_SYSPRI14 E000ED22
|
||
|
||
Symbol: NVIC_SYSPRI14
|
||
Definitions
|
||
At line 58 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 189 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: NVIC_SYSPRI14 used once
|
||
4 symbols
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 1 Alphabetic symbol ordering
|
||
External symbols
|
||
|
||
OSIntExit 00000000
|
||
|
||
Symbol: OSIntExit
|
||
Definitions
|
||
At line 36 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
None
|
||
Comment: OSIntExit unused
|
||
OSPrioCur 00000000
|
||
|
||
Symbol: OSPrioCur
|
||
Definitions
|
||
At line 32 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 297 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSPrioCur used once
|
||
OSPrioHighRdy 00000000
|
||
|
||
Symbol: OSPrioHighRdy
|
||
Definitions
|
||
At line 33 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 298 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSPrioHighRdy used once
|
||
OSRunning 00000000
|
||
|
||
Symbol: OSRunning
|
||
Definitions
|
||
At line 31 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 200 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSRunning used once
|
||
OSTCBCur 00000000
|
||
|
||
Symbol: OSTCBCur
|
||
Definitions
|
||
At line 34 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 95 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
At line 286 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
At line 302 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
|
||
OSTCBHighRdy 00000000
|
||
|
||
Symbol: OSTCBHighRdy
|
||
Definitions
|
||
At line 35 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
|
||
|
||
|
||
ARM Macro Assembler Page 2 Alphabetic symbol ordering
|
||
External symbols
|
||
|
||
Uses
|
||
At line 122 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
At line 303 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
|
||
OSTaskSwHook 00000000
|
||
|
||
Symbol: OSTaskSwHook
|
||
Definitions
|
||
At line 37 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 293 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OSTaskSwHook used once
|
||
OS_CPU_ExceptStkBase 00000000
|
||
|
||
Symbol: OS_CPU_ExceptStkBase
|
||
Definitions
|
||
At line 38 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-Co
|
||
rtex-M4\Generic\RealView\os_cpu_a.asm
|
||
Uses
|
||
At line 196 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uCOS-II\Ports\ARM-C
|
||
ortex-M4\Generic\RealView\os_cpu_a.asm
|
||
Comment: OS_CPU_ExceptStkBase used once
|
||
8 symbols
|
||
360 symbols in table
|