581 lines
27 KiB
Plaintext
581 lines
27 KiB
Plaintext
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ARM Macro Assembler Page 1
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1 00000000 ;*******************************************************
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*************************************************
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2 00000000 ; uC/CPU
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3 00000000 ; CPU CONFIGURATION &
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PORT LAYER
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4 00000000 ;
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5 00000000 ; (c) Copyright 2004-2013; Micr
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ium, Inc.; Weston, FL
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6 00000000 ;
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7 00000000 ; All rights reserved. Protected by inter
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national copyright laws.
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8 00000000 ;
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9 00000000 ; uC/CPU is provided in source form to reg
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istered licensees ONLY. It is
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10 00000000 ; illegal to distribute this source code t
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o any third party unless you receive
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11 00000000 ; written permission by an authorized Micr
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ium representative. Knowledge of
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12 00000000 ; the source code may NOT be used to devel
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op a similar product.
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13 00000000 ;
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14 00000000 ; Please help us continue to provide the E
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mbedded community with the finest
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15 00000000 ; software available. Your honesty is gre
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atly appreciated.
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16 00000000 ;
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17 00000000 ; You can find our product's user manual,
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API reference, release notes and
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18 00000000 ; more information at https://doc.micrium.
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com.
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19 00000000 ; You can contact us at www.micrium.com.
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20 00000000 ;*******************************************************
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*************************************************
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21 00000000
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22 00000000 ;*******************************************************
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*************************************************
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23 00000000 ;
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24 00000000 ; CPU PORT FI
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LE
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25 00000000 ;
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26 00000000 ; ARM-Cortex-
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M4
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27 00000000 ; RealView Developm
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ent Suite
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28 00000000 ; RealView Microcontroller De
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velopment Kit (MDK)
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29 00000000 ; ARM Developer Su
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ite (ADS)
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30 00000000 ; Keil uVisio
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n
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31 00000000 ;
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32 00000000 ; Filename : cpu_a.asm
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33 00000000 ; Version : V1.30.00.00
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34 00000000 ; Programmer(s) : JJL
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35 00000000 ;*******************************************************
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*************************************************
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36 00000000
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37 00000000
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38 00000000 ;*******************************************************
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ARM Macro Assembler Page 2
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*************************************************
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39 00000000 ; PUBLIC FUNCT
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IONS
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40 00000000 ;*******************************************************
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*************************************************
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41 00000000
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42 00000000 EXPORT CPU_IntDis
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43 00000000 EXPORT CPU_IntEn
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44 00000000
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45 00000000 EXPORT CPU_SR_Save
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46 00000000 EXPORT CPU_SR_Restore
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47 00000000
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48 00000000 EXPORT CPU_WaitForInt
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49 00000000 EXPORT CPU_WaitForExcept
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50 00000000
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51 00000000
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52 00000000 EXPORT CPU_CntLeadZeros
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53 00000000 EXPORT CPU_CntTrailZeros
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54 00000000 EXPORT CPU_RevBits
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55 00000000
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56 00000000
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57 00000000 ;*******************************************************
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*************************************************
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58 00000000 ; CODE GENERATION D
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IRECTIVES
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59 00000000 ;*******************************************************
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*************************************************
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60 00000000
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61 00000000 AREA |.text|, CODE, READONLY, ALIGN=
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2
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62 00000000 THUMB
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63 00000000 REQUIRE8
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64 00000000 PRESERVE8
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65 00000000
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66 00000000 ;*******************************************************
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*************************************************
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67 00000000 ; DISABLE and ENABLE
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INTERRUPTS
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68 00000000 ;
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69 00000000 ; Description: Disable/Enable interrupts.
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70 00000000 ;
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71 00000000 ; Prototypes : void CPU_IntDis(void);
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72 00000000 ; void CPU_IntEn (void);
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73 00000000 ;*******************************************************
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*************************************************
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74 00000000
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75 00000000 CPU_IntDis
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76 00000000 B672 CPSID I
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77 00000002 4770 BX LR
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78 00000004
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79 00000004
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80 00000004 CPU_IntEn
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81 00000004 B662 CPSIE I
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82 00000006 4770 BX LR
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83 00000008
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84 00000008
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85 00000008 ;*******************************************************
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*************************************************
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86 00000008 ; CRITICAL SECTION
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ARM Macro Assembler Page 3
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FUNCTIONS
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87 00000008 ;
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88 00000008 ; Description : Disable/Enable interrupts by preserving
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the state of interrupts. Generally speaking, the
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89 00000008 ; state of the interrupt disable flag is s
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tored in the local variable 'cpu_sr' & interrupts
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90 00000008 ; are then disabled ('cpu_sr' is allocated
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in all functions that need to disable interrupts).
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91 00000008 ; The previous interrupt state is restored
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by copying 'cpu_sr' into the CPU's status register.
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92 00000008 ;
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93 00000008 ; Prototypes : CPU_SR CPU_SR_Save (void);
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94 00000008 ; void CPU_SR_Restore(CPU_SR cpu_sr);
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95 00000008 ;
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96 00000008 ; Note(s) : (1) These functions are used in general
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like this :
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97 00000008 ;
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98 00000008 ; void Task (void *p_arg)
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99 00000008 ; {
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100 00000008 ; CPU_SR_ALLOC();
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/* Allocate storage for CPU status register */
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101 00000008 ; :
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102 00000008 ; :
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103 00000008 ; CPU_CRITICAL_ENTER();
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/* cpu_sr = CPU_SR_Save(); */
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104 00000008 ; :
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105 00000008 ; :
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106 00000008 ; CPU_CRITICAL_EXIT();
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/* CPU_SR_Restore(cpu_sr); */
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107 00000008 ; :
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108 00000008 ; }
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109 00000008 ;*******************************************************
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*************************************************
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110 00000008
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111 00000008 CPU_SR_Save
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112 00000008 F3EF 8010 MRS R0, PRIMASK ; Set prio int mask
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to mask all (excep
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t faults)
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113 0000000C B672 CPSID I
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114 0000000E 4770 BX LR
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115 00000010
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116 00000010
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117 00000010 CPU_SR_Restore ; See Note #2.
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118 00000010 F380 8810 MSR PRIMASK, R0
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119 00000014 4770 BX LR
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120 00000016
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121 00000016
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122 00000016 ;*******************************************************
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*************************************************
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123 00000016 ; WAIT FOR INTER
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RUPT
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124 00000016 ;
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125 00000016 ; Description : Enters sleep state, which will be exited
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when an interrupt is received.
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126 00000016 ;
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127 00000016 ; Prototypes : void CPU_WaitForInt (void)
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128 00000016 ;
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129 00000016 ; Argument(s) : none.
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130 00000016 ;*******************************************************
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ARM Macro Assembler Page 4
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*************************************************
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131 00000016
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132 00000016 CPU_WaitForInt
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133 00000016 BF30 WFI ; Wait for interrup
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t
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134 00000018 4770 BX LR
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135 0000001A
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136 0000001A
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137 0000001A ;*******************************************************
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*************************************************
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138 0000001A ; WAIT FOR EXCEP
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TION
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139 0000001A ;
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140 0000001A ; Description : Enters sleep state, which will be exited
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when an exception is received.
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141 0000001A ;
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142 0000001A ; Prototypes : void CPU_WaitForExcept (void)
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143 0000001A ;
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144 0000001A ; Argument(s) : none.
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145 0000001A ;*******************************************************
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*************************************************
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146 0000001A
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147 0000001A CPU_WaitForExcept
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148 0000001A BF20 WFE ; Wait for exceptio
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n
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149 0000001C 4770 BX LR
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150 0000001E
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151 0000001E
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152 0000001E ;*******************************************************
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*************************************************
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153 0000001E ; CPU_CntLeadZer
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os()
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154 0000001E ; COUNT LEADING Z
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EROS
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155 0000001E ;
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156 0000001E ; Description : Counts the number of contiguous, most-si
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gnificant, leading zero bits before the
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157 0000001E ; first binary one bit in a data value
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.
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158 0000001E ;
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159 0000001E ; Prototype : CPU_DATA CPU_CntLeadZeros(CPU_DATA val
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);
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160 0000001E ;
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161 0000001E ; Argument(s) : val Data value to count leading
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zero bits.
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162 0000001E ;
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163 0000001E ; Return(s) : Number of contiguous, most-significant,
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leading zero bits in 'val'.
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164 0000001E ;
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165 0000001E ; Caller(s) : Application.
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166 0000001E ;
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167 0000001E ; This function is an INTERNAL CPU module
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function but MAY be called by application
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168 0000001E ; function(s).
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169 0000001E ;
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170 0000001E ; Note(s) : (1) (a) Supports 32-bit data value size
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as configured by 'CPU_DATA' (see 'cpu.h
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171 0000001E ; CPU WORD CONFIGURATION Note #1'
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).
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ARM Macro Assembler Page 5
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172 0000001E ;
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173 0000001E ; (b) For 32-bit values :
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174 0000001E ;
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175 0000001E ; b31 b30 b29 ... b04 b
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03 b02 b01 b00 # Leading Zeros
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176 0000001E ; --- --- --- --- -
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-- --- --- --- ---------------
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177 0000001E ; 1 x x x
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x x x x 0
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178 0000001E ; 0 1 x x
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x x x x 1
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179 0000001E ; 0 0 1 x
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x x x x 2
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180 0000001E ; : : : :
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: : : : :
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181 0000001E ; : : : :
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: : : : :
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182 0000001E ; 0 0 0 1
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x x x x 27
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183 0000001E ; 0 0 0 0
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1 x x x 28
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184 0000001E ; 0 0 0 0
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0 1 x x 29
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185 0000001E ; 0 0 0 0
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0 0 1 x 30
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186 0000001E ; 0 0 0 0
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0 0 0 1 31
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187 0000001E ; 0 0 0 0
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0 0 0 0 32
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188 0000001E ;
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189 0000001E ;
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190 0000001E ; (2) MUST be defined in 'cpu_a.asm' (or '
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cpu_c.c') if CPU_CFG_LEAD_ZEROS_ASM_PRESENT is
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191 0000001E ; #define'd in 'cpu_cfg.h' or 'cpu.h'.
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192 0000001E ;*******************************************************
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*************************************************
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193 0000001E
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194 0000001E CPU_CntLeadZeros
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195 0000001E FAB0 F080 CLZ R0, R0 ; Count leading zer
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os
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196 00000022 4770 BX LR
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197 00000024
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198 00000024
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199 00000024 ;*******************************************************
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*************************************************
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200 00000024 ; CPU_CntTrailZe
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ros()
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201 00000024 ; COUNT TRAILING
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ZEROS
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202 00000024 ;
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203 00000024 ; Description : Counts the number of contiguous, least-s
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ignificant, trailing zero bits before the
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204 00000024 ; first binary one bit in a data value
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.
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205 00000024 ;
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206 00000024 ; Prototype : CPU_DATA CPU_CntTrailZeros(CPU_DATA va
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l);
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207 00000024 ;
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ARM Macro Assembler Page 6
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208 00000024 ; Argument(s) : val Data value to count trailing
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zero bits.
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209 00000024 ;
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210 00000024 ; Return(s) : Number of contiguous, least-significant,
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trailing zero bits in 'val'.
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211 00000024 ;
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212 00000024 ; Caller(s) : Application.
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213 00000024 ;
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214 00000024 ; This function is an INTERNAL CPU module
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function but MAY be called by application
|
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215 00000024 ; function(s).
|
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216 00000024 ;
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217 00000024 ; Note(s) : (1) (a) Supports 32-bit data value size
|
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as configured by 'CPU_DATA' (see 'cpu.h
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218 00000024 ; CPU WORD CONFIGURATION Note #1'
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).
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219 00000024 ;
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220 00000024 ; (b) For 32-bit values :
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221 00000024 ;
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222 00000024 ; b31 b30 b29 b28 b27 .
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.. b02 b01 b00 # Trailing Zeros
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223 00000024 ; --- --- --- --- ---
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--- --- --- ----------------
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224 00000024 ; x x x x x
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x x 1 0
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225 00000024 ; x x x x x
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x 1 0 1
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226 00000024 ; x x x x x
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1 0 0 2
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227 00000024 ; : : : : :
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: : : :
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228 00000024 ; : : : : :
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: : : :
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229 00000024 ; x x x x 1
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0 0 0 27
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230 00000024 ; x x x 1 0
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0 0 0 28
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231 00000024 ; x x 1 0 0
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0 0 0 29
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232 00000024 ; x 1 0 0 0
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0 0 0 30
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233 00000024 ; 1 0 0 0 0
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0 0 0 31
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234 00000024 ; 0 0 0 0 0
|
|||
|
|
0 0 0 32
|
|||
|
|
235 00000024 ;
|
|||
|
|
236 00000024 ;
|
|||
|
|
237 00000024 ; (2) MUST be defined in 'cpu_a.asm' (or '
|
|||
|
|
cpu_c.c') if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT is
|
|||
|
|
238 00000024 ; #define'd in 'cpu_cfg.h' or 'cpu.h'.
|
|||
|
|
|
|||
|
|
239 00000024 ;*******************************************************
|
|||
|
|
*************************************************
|
|||
|
|
240 00000024
|
|||
|
|
241 00000024 CPU_CntTrailZeros
|
|||
|
|
242 00000024 FA90 F0A0 RBIT R0, R0 ; Reverse bits
|
|||
|
|
243 00000028 FAB0 F080 CLZ R0, R0 ; Count trailing ze
|
|||
|
|
ros
|
|||
|
|
244 0000002C 4770 BX LR
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
ARM Macro Assembler Page 7
|
|||
|
|
|
|||
|
|
|
|||
|
|
245 0000002E
|
|||
|
|
246 0000002E
|
|||
|
|
247 0000002E ;*******************************************************
|
|||
|
|
*************************************************
|
|||
|
|
248 0000002E ; CPU_RevBits
|
|||
|
|
()
|
|||
|
|
249 0000002E ; REVERSE BIT
|
|||
|
|
S
|
|||
|
|
250 0000002E ;
|
|||
|
|
251 0000002E ; Description : Reverses the bits in a data value.
|
|||
|
|
252 0000002E ;
|
|||
|
|
253 0000002E ; Prototypes : CPU_DATA CPU_RevBits(CPU_DATA val);
|
|||
|
|
254 0000002E ;
|
|||
|
|
255 0000002E ; Argument(s) : val Data value to reverse bits.
|
|||
|
|
256 0000002E ;
|
|||
|
|
257 0000002E ; Return(s) : Value with all bits in 'val' reversed (s
|
|||
|
|
ee Note #1).
|
|||
|
|
258 0000002E ;
|
|||
|
|
259 0000002E ; Caller(s) : Application.
|
|||
|
|
260 0000002E ;
|
|||
|
|
261 0000002E ; This function is an INTERNAL CPU module
|
|||
|
|
function but MAY be called by application function(s).
|
|||
|
|
262 0000002E ;
|
|||
|
|
263 0000002E ; Note(s) : (1) The final, reversed data value for '
|
|||
|
|
val' is such that :
|
|||
|
|
264 0000002E ;
|
|||
|
|
265 0000002E ; 'val's final bit 0 = 'va
|
|||
|
|
l's original bit N
|
|||
|
|
266 0000002E ; 'val's final bit 1 = 'va
|
|||
|
|
l's original bit (N - 1)
|
|||
|
|
267 0000002E ; 'val's final bit 2 = 'va
|
|||
|
|
l's original bit (N - 2)
|
|||
|
|
268 0000002E ;
|
|||
|
|
269 0000002E ; ...
|
|||
|
|
...
|
|||
|
|
270 0000002E ;
|
|||
|
|
271 0000002E ; 'val's final bit (N - 2) = 'va
|
|||
|
|
l's original bit 2
|
|||
|
|
272 0000002E ; 'val's final bit (N - 1) = 'va
|
|||
|
|
l's original bit 1
|
|||
|
|
273 0000002E ; 'val's final bit N = 'va
|
|||
|
|
l's original bit 0
|
|||
|
|
274 0000002E ;*******************************************************
|
|||
|
|
*************************************************
|
|||
|
|
275 0000002E
|
|||
|
|
276 0000002E CPU_RevBits
|
|||
|
|
277 0000002E FA90 F0A0 RBIT R0, R0 ; Reverse bits
|
|||
|
|
278 00000032 4770 BX LR
|
|||
|
|
279 00000034
|
|||
|
|
280 00000034
|
|||
|
|
281 00000034 ;*******************************************************
|
|||
|
|
*************************************************
|
|||
|
|
282 00000034 ; CPU ASSEMBLY PORT
|
|||
|
|
FILE END
|
|||
|
|
283 00000034 ;*******************************************************
|
|||
|
|
*************************************************
|
|||
|
|
284 00000034
|
|||
|
|
285 00000034 END
|
|||
|
|
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M4.fp --apcs=int
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
ARM Macro Assembler Page 8
|
|||
|
|
|
|||
|
|
|
|||
|
|
erwork --depend=.\objects\cpu_a.d -o.\objects\cpu_a.o -ID:\Project\<5C><>ѵ\RTCGet(
|
|||
|
|
3)\Project\MDK\RTE -I"D:\Program Files\Keil_v5\ARM\PACK\Keil\TM4C_DFP\1.1.0\Dev
|
|||
|
|
ice\Include\TM4C129" -I"D:\Program Files\Keil_v5\ARM\CMSIS\Include" --predefine
|
|||
|
|
="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 518" --predefine="TM4C
|
|||
|
|
1292NCPDT SETA 1" --list=.\listings\cpu_a.lst ..\..\Src\Micrium-DK-TM4C129X-OS2
|
|||
|
|
\uC-CPU\ARM-Cortex-M4\RealView\cpu_a.asm
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
ARM Macro Assembler Page 1 Alphabetic symbol ordering
|
|||
|
|
Relocatable symbols
|
|||
|
|
|
|||
|
|
.text 00000000
|
|||
|
|
|
|||
|
|
Symbol: .text
|
|||
|
|
Definitions
|
|||
|
|
At line 61 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
None
|
|||
|
|
Comment: .text unused
|
|||
|
|
CPU_CntLeadZeros 0000001E
|
|||
|
|
|
|||
|
|
Symbol: CPU_CntLeadZeros
|
|||
|
|
Definitions
|
|||
|
|
At line 194 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M
|
|||
|
|
4\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 52 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_CntLeadZeros used once
|
|||
|
|
CPU_CntTrailZeros 00000024
|
|||
|
|
|
|||
|
|
Symbol: CPU_CntTrailZeros
|
|||
|
|
Definitions
|
|||
|
|
At line 241 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M
|
|||
|
|
4\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 53 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_CntTrailZeros used once
|
|||
|
|
CPU_IntDis 00000000
|
|||
|
|
|
|||
|
|
Symbol: CPU_IntDis
|
|||
|
|
Definitions
|
|||
|
|
At line 75 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 42 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_IntDis used once
|
|||
|
|
CPU_IntEn 00000004
|
|||
|
|
|
|||
|
|
Symbol: CPU_IntEn
|
|||
|
|
Definitions
|
|||
|
|
At line 80 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 43 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_IntEn used once
|
|||
|
|
CPU_RevBits 0000002E
|
|||
|
|
|
|||
|
|
Symbol: CPU_RevBits
|
|||
|
|
Definitions
|
|||
|
|
At line 276 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M
|
|||
|
|
4\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 54 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_RevBits used once
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
ARM Macro Assembler Page 2 Alphabetic symbol ordering
|
|||
|
|
Relocatable symbols
|
|||
|
|
|
|||
|
|
CPU_SR_Restore 00000010
|
|||
|
|
|
|||
|
|
Symbol: CPU_SR_Restore
|
|||
|
|
Definitions
|
|||
|
|
At line 117 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M
|
|||
|
|
4\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 46 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_SR_Restore used once
|
|||
|
|
CPU_SR_Save 00000008
|
|||
|
|
|
|||
|
|
Symbol: CPU_SR_Save
|
|||
|
|
Definitions
|
|||
|
|
At line 111 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M
|
|||
|
|
4\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 45 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_SR_Save used once
|
|||
|
|
CPU_WaitForExcept 0000001A
|
|||
|
|
|
|||
|
|
Symbol: CPU_WaitForExcept
|
|||
|
|
Definitions
|
|||
|
|
At line 147 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M
|
|||
|
|
4\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 49 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_WaitForExcept used once
|
|||
|
|
CPU_WaitForInt 00000016
|
|||
|
|
|
|||
|
|
Symbol: CPU_WaitForInt
|
|||
|
|
Definitions
|
|||
|
|
At line 132 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M
|
|||
|
|
4\RealView\cpu_a.asm
|
|||
|
|
Uses
|
|||
|
|
At line 48 in file ..\..\Src\Micrium-DK-TM4C129X-OS2\uC-CPU\ARM-Cortex-M4
|
|||
|
|
\RealView\cpu_a.asm
|
|||
|
|
Comment: CPU_WaitForInt used once
|
|||
|
|
10 symbols
|
|||
|
|
344 symbols in table
|