69 lines
2.2 KiB
C
69 lines
2.2 KiB
C
|
#include "McuBspSys.h"
|
|||
|
|
|
|||
|
|
int McuBspSysInit(void)
|
|||
|
|
{
|
|||
|
|
/* 底层库初始化 */
|
|||
|
|
HAL_Init();
|
|||
|
|
/* 系统时钟初始化 */
|
|||
|
|
McuBspSysClockInit();
|
|||
|
|
__HAL_RCC_PWR_CLK_ENABLE(); // 使能电压时钟（在进入低功耗时，如果使能电源时钟，可以降低10us左右的功耗）
|
|||
|
|
/* 特殊GPIO始终初始化(使用SWD调试，并开放JTAG的引脚) */
|
|||
|
|
__HAL_RCC_AFIO_CLK_ENABLE();
|
|||
|
|
__HAL_AFIO_REMAP_SWJ_NOJTAG();
|
|||
|
|
__HAL_AFIO_REMAP_PD01_ENABLE();
|
|||
|
|
__HAL_AFIO_REMAP_USART3_ENABLE();
|
|||
|
|
return 0;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
void McuBspSysClockInit(void)
|
|||
|
|
{
|
|||
|
|
RCC_ClkInitTypeDef clkinitstruct = {0};
|
|||
|
|
RCC_OscInitTypeDef oscinitstruct = {0};
|
|||
|
|
|
|||
|
|
/* Configure PLL ------------------------------------------------------*/
|
|||
|
|
/* PLL configuration: PLLCLK = (HSE / 1) * PLLMUL = 8 * 9 = 72 MHz */
|
|||
|
|
/* PREDIV1 configuration: PREDIV1CLK = PLLCLK / HSEPredivValue = 72 / 1 = 72 MHz */
|
|||
|
|
/* Enable HSI and activate PLL with HSi_DIV2 as source */
|
|||
|
|
oscinitstruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|||
|
|
oscinitstruct.HSEState = RCC_HSE_ON;
|
|||
|
|
oscinitstruct.LSEState = RCC_LSE_OFF;
|
|||
|
|
oscinitstruct.HSIState = RCC_HSI_OFF;
|
|||
|
|
oscinitstruct.LSIState = RCC_LSI_OFF;
|
|||
|
|
oscinitstruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
|||
|
|
oscinitstruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
|
|||
|
|
oscinitstruct.PLL.PLLState = RCC_PLL_ON;
|
|||
|
|
oscinitstruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|||
|
|
oscinitstruct.PLL.PLLMUL = RCC_PLL_MUL9;
|
|||
|
|
if (HAL_RCC_OscConfig(&oscinitstruct)!= HAL_OK)
|
|||
|
|
{
|
|||
|
|
/* Initialization Error */
|
|||
|
|
while(1);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
|||
|
|
clocks dividers */
|
|||
|
|
clkinitstruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
|||
|
|
clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|||
|
|
clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|||
|
|
clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
|||
|
|
clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
|||
|
|
if (HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_2)!= HAL_OK)
|
|||
|
|
{
|
|||
|
|
/* Initialization Error */
|
|||
|
|
while(1);
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* 底层硬件初始化 */
|
|||
|
|
void HAL_MspInit(void)
|
|||
|
|
{
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* 底层硬件反初始化 */
|
|||
|
|
void HAL_MspDeInit(void)
|
|||
|
|
{
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|